create_project -part xc5vlx110tff1136-1 -force planahead {D:\Felipe\Nessy50\ProyectosNessy\Reg60\planahead}
set_property design_mode GateLvl [get_property srcset [current_run]]
set_property edif_top_file {D:\Felipe\Nessy50\ProyectosNessy\Reg60\edk\implementation\system.ngc} [get_property srcset [current_run]]
import_files -force -norecurse {D:\Felipe\Nessy50\ProyectosNessy\Reg60\edk\implementation}
add_files -fileset [get_property constrset [current_run]] -norecurse {D:\Felipe\Nessy50\ProyectosNessy\Reg60\edk\data\system.ucf}
set_property name config_1 [current_run]
set_property is_partial_reconfig true [current_project]
open_netlist_design -name netlist_1
add_reconfig_module -name circuito_reconfig -cell {circuito_0}
resize_pblock pblock_circuito_0 -add {SLICE_X100Y100:SLICE_X102Y140} -locs keep_all -replace
set_property name config_nessy [get_runs config_1]
set_property strategy "ISE Defaults" [get_runs config_nessy]
set_property  gridtypes {DSP48 SLICE} [get_pblocks pblock_circuito_0]
config_run -run config_nessy -program ngdbuild -option -bm -value {D:\Felipe\Nessy50\ProyectosNessy\Reg60\edk\implementation\system.bmm}
save_design
launch_runs -runs config_nessy -jobs 1 -dir {D:\Felipe\Nessy50\ProyectosNessy\Reg60\planahead\planahead.runs}


wait_on_run config_nessy
promote_run -run {config_nessy} -partition_names {  {system} {circuito_0} }
set_property add_step Bitgen [get_runs config_nessy]
launch_runs -runs config_nessy -jobs 1 -dir {D:\Felipe\Nessy50\ProyectosNessy\Reg60\planahead\planahead.runs}
wait_on_run config_nessy
exit
